riscv / sail-riscv

Sail RISC-V model
https://lists.riscv.org/g/tech-golden-model
Other
421 stars 158 forks source link

Exit condition for SAIL model simulating elf code is not intuitive #218

Open ssecatch-w opened 1 year ago

ssecatch-w commented 1 year ago

I'm running pre-compiled elf files within the SAIL environment running under the C emulator. There is a variable declared in c_emulator/riscv_platform_impl.c called rv_htif_tohost, which appears to be unused in favor of the tohost label in my load file. I don't know if that's a default that's overridden because that tag exists or if it's unused.

However, it seems that a sw to the tohost location is needed three times before the simulation terminates (with a successful exit code). I don't understand why a single write to that location is not sufficient. (I see three htif updates, but htif-syscall-proxy only happens on the third)

I didn't see any requirements listed within the documentation for conditions to end the simulation, but I think that these need to be documented, and it seems incorrect to me that three writes are needed to a tohost address in order to terminate.

Alasdair commented 1 year ago

I didn't write the code, but it seems like a workaround for tests that don't write the control bytes? There's this comment:

/ Applications sometimes write the lower 32-bit payload bytes without writing the control bytes; this is seen in the riscv-tests suite. However, processing the payload bytes too early could miss a subsequent write to the control bytes. As a workaround, if the payload is written a few times with the same value, without an intervening write to the control bytes, we process the whole htif command anyway. /

Alasdair commented 1 year ago

Is there any documentation for this HTIF thing? Some googling just lead to me to github issues about the lack of documentation which seems like a poor sign.

Edit: To clarify - a poor sign for being confident that we are implementing it correctly

abukharmeh commented 1 year ago

Hi, I think HTIF does not support blocking character device for 32-bit but the model have some work around to allow it to support that https://github.com/riscv/sail-riscv/issues/147 I think if we want to correctly support HTIF as in Spike, then BCD should be dropped for 32-bit in favor of syscalls