riscv / sail-riscv

Sail RISC-V model
https://lists.riscv.org/g/tech-golden-model
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Add comment explaining why the model doesn't use vectors for registers #409

Open Timmmm opened 7 months ago

Timmmm commented 7 months ago

As far as I can see there's no reason to have this:

register x1  : regtype
register x2  : regtype
register x3  : regtype
register x4  : regtype
register x5  : regtype
register x6  : regtype
...

Instead of

register xrf : vec(regtype, 32)

This is done for all the X, F and V registers.

Alasdair commented 7 months ago

In the concurrency model, x1 .. xN are separate registers for intra-instruction dependencies (so instructions modifying different registers can be re-ordered), whereas xrf : vector(...) would be a single register.

Timmmm commented 6 months ago

Ah very subtle but that makes sense. I'll leave this issue open so we add a comment to the code.