riscv / sail-riscv

Sail RISC-V model
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VM code doesn't check reserved bits of PTEs are zero #457

Open Timmmm opened 5 months ago

Timmmm commented 5 months ago

From the Sv39 spec:

The PTE format for Sv39 is shown in Figure 60. Bits 9-0 have the same meaning as for Sv32. Bit 63 is reserved for use by the Svnapot extension in Chapter 6. If Svnapot is not implemented, bit 63 remains reserved and must be zeroed by software for forward compatibility, or else a page-fault exception is raised. Bits 62-61 are reserved for use by the Svpbmt extension in Chapter 7. If Svpbmt is not implemented, bits 62-61 remain reserved and must be zeroed by software for forward compatibility, or else a page-fault exception is raised. Bits 60-54 are reserved for future standard use and, until their use is defined by some standard extension, must be zeroed by software for forward compatibility. If any of these bits are set, a page-fault exception is raised.

The current code doesn't check these reserved bits at all.

jrtc27 commented 5 months ago

That requirement doesn’t exist in older versions of the spec IIRC

Timmmm commented 5 months ago

Ah maybe. It's in the 20211203 version (current ratified one linked from the risc-v website).

jrtc27 commented 5 months ago

20190608 (ratified v1.11) says just:

The PTE format for Sv39 is shown in Figure 4.18. Bits 9–0 have the same meaning as for Sv32. Bits 63–54 are reserved for future use and must be zeroed by software for forward compatibility.

allenjbaum commented 5 months ago

Welcome to extension versioning. The earlier spec is probably priv1.10, as opposed to priv1.11 or priv1.12 or priv1.13 (which was just described in the Committee Chairs meeting- most of the changes are really clarifications of behaviors, or giving names to optional behaviors that previously had no name) The imperas simulator has command line switches to handle each behaviors (and more, for cases where someone implemented an unratified spec, and then it got changed) This will need a CLI (and eventually YAML) that describes which version of the priv spec .

On Wed, Apr 24, 2024 at 8:46 AM Jessica Clarke @.***> wrote:

20190608 says just:

The PTE format for Sv39 is shown in Figure 4.18. Bits 9–0 have the same meaning as for Sv32. Bits 63–54 are reserved for future use and must be zeroed by software for forward compatibility.

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Timmmm commented 5 months ago

Yeah see #319. I would suggest that until we have flags for this it probably makes sense to implement the latest ratified version and add comments where there are differences between versions like here.

I may have a go at implementing #319 at least for the privileged/unprivileged specs. Shouldn't be too hard.