search

riscv / sail-riscv

Sail RISC-V model
https://lists.riscv.org/g/tech-golden-model
Other
433 stars 159 forks source link

Handle 34-bit PMP address overflow #474

Closed Timmmm closed 4 months ago

Timmmm commented 4 months ago

The existing PMP code could not handle physical addresses above 32 bits on RV32, which are possible since Sv32 has 34-bit physical addresses, and the PMP registers are in units of 4 bytes, so they can encode 34-bit addresses.

This fixes that by delaying the *4 until the comparison where it can be done using nat instead of xlenbits which it would overflow.

github-actions[bot] commented 4 months ago

Test Results

712 tests  ±0   712 :white_check_mark: ±0   0s :stopwatch: ±0s   6 suites ±0     0 :zzz: ±0    1 files   ±0     0 :x: ±0 

Results for commit 6b681728. ± Comparison against base commit e1242d85.