Closed Nelson1225 closed 4 years ago
Dear all,
I get a request that we need to support more vsew registers for vtypei setting of vsetvli.
According to riscv vector spec: https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc#321-vector-standard-element-width-vsew
vsew[2:0] 3-bit, 8 types of vsew: e8, e16, e32, e64, e128, e256, e512, e1024
Thanks Best Regards Nelson
Dear all,
I get a request that we need to support more vsew registers for vtypei setting of vsetvli.
According to riscv vector spec: https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc#321-vector-standard-element-width-vsew
vsew[2:0] 3-bit, 8 types of vsew: e8, e16, e32, e64, e128, e256, e512, e1024
Thanks Best Regards Nelson