Accept constant 0 for address of vector amo instruction

riscvarchive / riscv-binutils-gdb

RISC-V backports for binutils-gdb. Development is done upstream at the FSF.

GNU General Public License v2.0

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Accept constant 0 for address of vector amo instruction #192

Closed kito-cheng closed 4 years ago

kito-cheng commented 4 years ago

Scalar AMO instruction and other vector load store can accept address start with 0, so I think it would be better to support that for vector AMO for symmetric.

Nelson1225 commented 4 years ago

Agree with you :)