riscvarchive / riscv-binutils-gdb

RISC-V backports for binutils-gdb. Development is done upstream at the FSF.
GNU General Public License v2.0
147 stars 233 forks source link

Change the expansions and conversion for pseudo vector compare instructions (integer and scale). #207

Closed Nelson1225 closed 4 years ago

Nelson1225 commented 4 years ago

There are two issues about the vector compare instructions recently,

  1. Convert the pseudo vmsltu.vi/vmsgeu.vi to vmsne.vv/vmseq.vv, when imm is zero. (https://github.com/riscv/riscv-binutils-gdb/issues/206)

We convert the pseudo instructions

`vmsltu.vi/vmsgeu.vi  vd, vs1, imm`

to

(imm isn't zero) `vmsleu.vi/vmsgtu.vi  vd, vs1, imm - 1`
(imm is zero)    `vmsne.vv/vmseq.vv    vd, vs1, vs1`
  1. Change the expansion for vmsge.vx and vmsgeu.vx with the unmasked va. (https://github.com/riscv/riscv-binutils-gdb/issues/208)

vmsge[u].vx v4, v8, a1 should be expanded to vmslt[u].vx v4,v8,a1 plus vmnot.m v4,v4.

Nelson1225 commented 4 years ago

Looks like two separate fixes, only one of which is mentioned in the explanation, but both look correct.

Yes, these are two separate issues. The first one is single instruction conversion, and the second one is expansion. I must miss the description for the first one...