4 arguments register may be a perf. issue for 64 bits type

riscvarchive / riscv-eabi-spec

Proposal for new Embedded ABI (EABI) for use in embedded RISC-V systems.

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4 arguments register may be a perf. issue for 64 bits type #8

Closed soberl closed 5 years ago

soberl commented 5 years ago

How about to merge temporary registers to arguments registers?

kasanovic commented 5 years ago

I believe there needs to be at least two temporaries that are not part of the argument registers for some linkage conventions to work - deferring to others on this issue.

soberl commented 5 years ago

Get it. I realize that the point here is x0-x4 take away 5 GPR away, so 4 arguments registers sounds reasonable. Thanks.