Create platform for BeagleV Starlight

[JohnAZoidberg]

We received a board.

Website: https://beagleboard.org/beaglev Documentation: https://github.com/beagleboard/beaglev-starlight Forum: https://forum.beagleboard.org/c/beaglev Datasheet: https://github.com/starfive-tech/beaglev_doc/blob/main/JH7100%20Data%20Sheet%20V01.01.04-EN%20(4-21-2021).pdf U-Boot device tree (also used by opensbi): https://github.com/starfive-tech/sft-riscv-uboot/blob/starfive/arch/riscv/dts/starfive_vic7100_evb.dts Instruction Set: rv64imafdc

Renode definition:

• https://github.com/renode/renode/blob/master/platforms/boards/beaglev_starlight.repl
• https://github.com/renode/renode/blob/master/platforms/cpus/starfive-jh7100.repl
• https://github.com/renode/renode/blob/master/scripts/single-node/beaglev_starlight.resc

WIP branch

https://github.com/riscv/riscv-edk2-platforms/tree/riscv-virt-gh-actions/Platform/

Status: No output so far. Not sure if it's executing anything.

Tutorials

• Getting started
• How to Make File System, Compile u-boot and Linux Kernel
• Flash bootloader, DDR init, U-Boot

I/O

• Required for UEFI shell
  • [ ] RISC-V U74 Dual core with 2MB L2 cache @ 1.0GHz
    • [ ] PcdFwStartAddress, PcdFwEndAddress
    • [x] PcdHartCount, PcdBootHartId, PcdBootableHartNumber
  • [x] Serial console via GPIO UART (NOT tested yet)
  • [x] CLINT (at 0x02000000 just like on U540)
  • [x] PLIC (at 0x0c000000 just like on U540 but generic OpenSBI platform gets it via DT)
  • [x] Add BeagleV Starlight Device Tree
• Extras
  • [ ] 4 x USB 3.0 Ports
    • [ ] Booting from USB
    • [ ] USB Keyboard and mouse
  • [ ] 1 x Gigabit Ethernet
  • [ ] System boot from SD card
  • [ ] 1 x Reset button and 1 x Power Button (ACPI buttons)
  • [ ] 1 x HDMI 1.4 support up to 1080P@60fps
  • [ ] SMBIOS for CPU, Cache, Memory
• Won't (need) support in UEFI
  • 1 x 3.5mm Audio jack
  • 1 x Wi-Fi 2.4GHz b/g/n and Bluetooth 4.2
  • Power with USB Type-C (5V@3A)
  • 2 x MIPI-CSI, 1 x MIPI-DSI
  • Vision DSP Tensilica-VP6 for computing vision
  • NVDLA Engine 1 core (configuration 2048 MACs@800MHz )
  • Neural Network Engine (1024MACs@500MHz)
• Other TODOs
  • [ ] Move to BeagleBoard/BeagleVStarlight directory and rename to BeagleVStarlight
  • [x] #18

[JohnAZoidberg]

Interesting locations in the memory map:

Start Address	End Address	Description
0x00_0200_0000	0x00_0200_FFFF	CLINT
0x00_0C00_0000	0x00_0FFF_FFFF	PLIC
0x00_1840_0000	0x00_1840_7FFF	ROM
0x00_1187_0000	0x00_1187_FFFF	HSUART0
0x00_1188_0000	0x00_1188_FFFF	HSUART1
0x00_1243_0000	0x00_1243_FFFF	UART2
0x00_1244_0000	0x00_1243_FFFF	UART3
0x00_1191_0000	0x00_1191_FFFF	GPIO

Uboot and OpenSBI use UART3:

    chosen {
            stdout-path = "/soc/serial@12440000:115200";
    };
    soc {
        uart3: serial@12440000 {
            compatible = "snps,dw-apb-uart";
            interrupt-parent = <&plic>;
            interrupts = <73>;
            reg = <0x0 0x12440000 0x0 0x10000>;
            reg-io-width = <4>;
            reg-shift = <2>;
            clocks = <&uartclk>, <&apb2clk>;
            clock-names = "baudclk", "apb_pclk";
            current-clock = <100000000>;
            current-speed = <115200>;
            status = "okay";
        };
    };

That UART (snps,dw-apb-uart) is documented here: https://www.kernel.org/doc/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.txt

Optional properties:
- snps,uart-16550-compatible : reflects the value of UART_16550_COMPATIBLE
  configuration parameter. Define this if your UART does not implement the busy
  functionality.

Sounds like it's very similar to the 16550 UART that edk2 has a driver for.

[JohnAZoidberg]

Boot source:

[JohnAZoidberg]

Tutorial for how to flash Uboot (probably same for EDKII): https://wiki.seeedstudio.com/BeagleV-Make-File-System-Compile-uboot-Kernal/#flash-uboot

[JohnAZoidberg]

USB

    soc {
        USB30: usb@104c0000 {
            compatible = "cdns,usb3";
            reg = <0x0 0x104c0000 0x0 0x10000>, // memory area for HOST registers
                <0x0 0x104d0000 0x0 0x10000>,   // memory area for DEVICE registers
                <0x0 0x104e0000 0x0 0x10000>;   // memory area for OTG/DRD registers
            reg-names = "otg", "xhci", "dev";
            interrupt-parent = <&plic>;
            interrupts = <43>, <44>, <52>;
            interrupt-names = "otg",
                    "host",
                    "peripheral";
            phy-names = "cdns3,usb3-phy", "cnds3,usb2-phy";
            status = "okay";
        };
    };

[JohnAZoidberg]

SPI Flash

https://www.kernel.org/doc/Documentation/devicetree/bindings/mtd/cadence-quadspi.txt

    soc {
        qspi:qspi@11860000 {
            compatible = "cadence,qspi","cdns,qspi-nor";
            #address-cells = <1>;
            #size-cells = <0>;
            reg = <0x0 0x11860000 0x0 0x10000 0x0 0x20000000 0x0 0x20000000 >;
            interrupts = <3>;
            interrupt-parent = <&plic>;
            clocks = <&qspi_clk>;
            cdns,fifo-depth = <256>;
            cdns,fifo-width = <4>;
            cdns,trigger-address = <0x00000000>;
            status = "okay";
            spi-max-frequency = <250000000>;
            nor_flash:nor-flash@0 {
                compatible = "spi-flash";
                reg=<0>;
                spi-max-frequency = <100000000>;
                page-size = <256>;
                block-size = <16>;
                cdns,read-delay = <4>;
                cdns,tshsl-ns = <1>;
                cdns,tsd2d-ns = <1>;
                cdns,tchsh-ns = <1>;
                cdns,tslch-ns = <1>;
                spi-tx-bus-width = <1>;
                spi-rx-bus-width = <1>;
            };
        };
    };

[JohnAZoidberg]

SD Card

https://www.kernel.org/doc/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt

    aliases {
        mshc0="/soc/sdio0@10000000";
    };
    soc {
        sdio0:sdio0@10000000{
            compatible = "snps,dw-mshc";
            reg = <0x0 0x10000000 0x0 0x10000>;
            interrupts = <4>;
            interrupt-parent = <&plic>;
            clocks = <&dwmmc_biuclk>;
            clock-names = "biu";
            clock-frequency = <100000000>;
            max-frequency = <50000000>;
            fifo-depth = <32>;
            card-detect-delay = <300>;
            fifo-watermark-aligned;
            data-addr = <0>;
            bus-width = <4>;
            cap-sd-highspeed;
            /*broken-cd;*/
            cap-sdio-irq;
            cap-mmc-hw-reset;
            non-removable;
            enable-sdio-wakeup;
            keep-power-in-suspend;
            /*cap-power-off-card;*/
            cap-mmc-highspeed;
            /*fixed-emmc-driver-type;*/
            post-power-on-delay-ms = <200>;
        };
    };

[JohnAZoidberg]

Ethernet

https://www.kernel.org/doc/Documentation/devicetree/bindings/net/snps,dwmac.yaml

    soc {
        gmac:gmac@10020000{
            compatible = "snps,dwmac";
            reg = <0x0 0x10020000 0x0 0x10000>;
            interrupt-parent = <&plic>;
            interrupts = <6 7>;
            interrupt-names = "macirq","eth_wake_irq";
            max-frame-size = <9000>;
            phy-mode = "rgmii-txid";
            snps,multicast-filter-bins = <256>;
            snps,perfect-filter-entries = <128>;
            rx-fifo-depth = <32768>;
            tx-fifo-depth = <16384>;
            clocks = <&gmacclk>;
            clock-names = "stmmaceth";
            snps,fixed-burst = <1>;
            snps,no-pbl-x8 = <1>;
            /*snps,force_sf_dma_mode;*/
            snps,force_thresh_dma_mode;
            snps,axi-config = <&stmmac_axi_setup>;
        };
    };

[JohnAZoidberg]

How to debug? We're stuck before the serial console is ready, so we need some other way to figure out where we're stuck.

JTAG

The board has JTAG but I don't know how to use that. There's a thread on the BeagleBoard forum but it seems the discussion is still ongoing. https://forum.beagleboard.org/t/jtag/28954/1

Renode

See links in issue description. Haven't figured out how to make it load EDKII instead of U-Boot.

LED

To see how far we're getting, we can just turn on/off the LED. It's GPIO 43 and U-Boot is doing that like this:

#define __iomem // __attribute__((noderef, address_space(2)))
#define MA_OUTW(io, val)    (*(volatile UINT32 __iomem *)(io) = (UINT32)(val))
#define MA_INW(io)      (*(volatile UINT32 __iomem *)(io))
#define EZGPIO_FULLMUX_BASE_ADDR            0x11910000UL

#define gpio_43_dout_REG_ADDR  EZGPIO_FULLMUX_BASE_ADDR + 0x1A8
#define gpio_43_doen_REG_ADDR  EZGPIO_FULLMUX_BASE_ADDR + 0x1AC

#define SET_GPIO_43_dout_LOW { \
    uint32_t _ezchip_macro_read_value_=MA_INW(gpio_43_dout_REG_ADDR); \
    _ezchip_macro_read_value_ &= ~(0xFF); \
    _ezchip_macro_read_value_ |= (0x0&0xFF); \
    MA_OUTW(gpio_43_dout_REG_ADDR,_ezchip_macro_read_value_); \
}

#define SET_GPIO_43_dout_HIGH { \
    uint32_t _ezchip_macro_read_value_=MA_INW(gpio_43_dout_REG_ADDR); \
    _ezchip_macro_read_value_ &= ~(0xFF); \
    _ezchip_macro_read_value_ |= (0x1&0xFF); \
    MA_OUTW(gpio_43_dout_REG_ADDR,_ezchip_macro_read_value_); \
}
#define SET_GPIO_43_doen_LOW { \
    uint32_t _ezchip_macro_read_value_=MA_INW(gpio_43_doen_REG_ADDR); \
    _ezchip_macro_read_value_ &= ~(0xFF); \
    _ezchip_macro_read_value_ |= (0x0&0xFF); \
    MA_OUTW(gpio_43_doen_REG_ADDR,_ezchip_macro_read_value_); \
}

SET_GPIO_43_doen_LOW;
SET_GPIO_43_dout_HIGH;
udelay(1000);
SET_GPIO_43_dout_LOW;
udelay(1000);
SET_GPIO_43_dout_HIGH;

See u-boot sources at:

• https://github.com/starfive-tech/u-boot/blob/7c585978616bac149f763b9422987795a50f21f1/arch/riscv/include/asm/arch-vic7100/ezGPIO_fullMux_ctrl_macro.h
• https://github.com/starfive-tech/u-boot/blob/7c585978616bac149f763b9422987795a50f21f1/arch/riscv/include/asm/arch-vic7100/io.h
• https://github.com/starfive-tech/u-boot/blob/7c585978616bac149f763b9422987795a50f21f1/lib/time.c

I haven't been able to make that work, though.

[macpijan]

@JohnAZoidberg This is really interesting thread and effort. I'm wondering if the status from 15 days ago is up to date, or you have managed to push something forward? Thanks.

[JohnAZoidberg]

@macpijan Nothing yet, don't know how to debug it.

[JohnAZoidberg]

BeagleV Starlight is cancelled, we still might support it, eventually, since we have 2 boards...