riscvarchive / riscv-fesvr

RISC-V Frontend Server
Other
62 stars 83 forks source link

This adds support for debug modules with an arbitrary address base. #60

Open msfschaffner opened 5 years ago

msfschaffner commented 5 years ago

The current implementation assumes that the debug module base is at 0x00. This makes the current fesvr implementation incompatible with platforms where the debug module is mapped to a different base address that is not zero.

Hence the dtm_t::modify_csr function that read-modify-writes CSRs is adapted. Other access functions are not affected, since: 1) they either work with abstract commands that are implemented in the debug module RTL, 2) or they do not access locations within the debug module using code snippets written to the program buffer.

The fix extracts the debug module base by reading the current PC and clearing the lowest 12bits, and hence the offset does not have to be known at compile time. However, it requires one more program buffer register (7 instead of 6).