Misc updates v2

[kumarsankaran]

Merged. Thanks.

Regards

Kumar

From: Atish Patra @.> Sent: Wednesday, November 24, 2021 3:23 PM To: riscv/riscv-platform-specs @.> Cc: Kumar Sankaran @.>; Review requested < @.> Subject: [riscv/riscv-platform-specs] Misc updates v2 (PR #63)

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You can view, comment on, or merge this pull request online at:

https://github.com/riscv/riscv-platform-specs/pull/63 Commit Summary

• 2433d78 https://github.com/riscv/riscv-platform-specs/pull/63/commits/2433d7844c8d1c20a99a0de5aab34ef467ec52fe Remove the machine mode requirements
• 9bf9842 https://github.com/riscv/riscv-platform-specs/pull/63/commits/9bf9842acb498c33cd72cff9b7db9ca5e79f5478 Specify M-mode protection content for platforms with M-mode
• d9b4480 https://github.com/riscv/riscv-platform-specs/pull/63/commits/d9b4480128cb6afbac7f841de178531cf09483c0 Update PCIe section to reflect M-mode optionality
• 6dbd73b https://github.com/riscv/riscv-platform-specs/pull/63/commits/6dbd73b8a43d5c4055909292b4baf24f1f997310 Reduce the number of mandatory PMU events.
• bc99de5 https://github.com/riscv/riscv-platform-specs/pull/63/commits/bc99de575a9628372c69ad8596b2718bd0eebbe2 Add more clarity about privilege mode optionality.
• 38d0b4b https://github.com/riscv/riscv-platform-specs/pull/63/commits/38d0b4b6618edfd5ac523e3748c369ed19a2d80d Update the ISA requirement section

File Changes

(1 file https://github.com/riscv/riscv-platform-specs/pull/63/files)

• M riscv-platform-spec.adoc https://github.com/riscv/riscv-platform-specs/pull/63/files#diff-e2e67320afc3dbcf884d10778f562bfa141048bbccbf7be067df8813a55a66fd (135)

Patch Links:

• https://github.com/riscv/riscv-platform-specs/pull/63.patch
• https://github.com/riscv/riscv-platform-specs/pull/63.diff

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