Qemu 2.12 fixes

[michaeljclark]

This is a series of spec conformance bug fixes and code cleanups that we would like to get in before the QEMU 2.12 release.

• Implements WARL behavior for CSRs that don't support writes
• Improves specification conformance of the page table walker
  • Change access checks from ternary operator to if statements
  • Checks for misaligned PPNs
  • Disallow M-mode or S-mode from fetching from User pages
  • Adds reserved PTE flag check: W or W|X
  • Set READ flag for PTE X flag if mstatus.mxr is in effect
  • Improves page walker comments and general readability
• Several trivial code cleanups to hw/riscv
  • Replacing hard coded constants with reference to enums or the machine memory maps.
  • Remove unnecessary class initialization boilerplate
• Adds bounds checks when writing device-tree to ROM
• Updates the cpu model to use a more modern interface
• Sets mtval/stval to zero on exceptions without addresses
• Fixes memory allocation bug in riscv_isa_string

v4

• added fix for memory allocation bug in riscv_isa_string

v3

• refactor rcu_read_lock in PTE update to use single unlock
• mstatus.mxr is in effect regardless of privilege mode
• remove unnecessary class init from riscv_hart
• set mtval/stval to zero on exceptions without addresses

v2

• remove unused class boilerplate retains qom parent_obj
• convert cpu definition towards future model
• honor mstatus.mxr flag in page table walker

v1

• initial post merge cleanup patch series