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QEMU with RISC-V (RV64G, RV32G) Emulation Support
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RISV-V: fix setting timecmp_lo #143

Closed exokortex closed 6 years ago

exokortex commented 6 years ago

Setting timecmp_lo should not copy timecmp_lo to timecmp_hi. Fixed by taking the upper 32 bits instead of lower ones.

michaeljclark commented 6 years ago

Good spotting. Thanks!

I merged this into the qemu-2.13-for-upstream and have rebuilt the riscv-all branch.

I expanded the commit log message, added your name and email so that we conform to upstream QEMU patch submission guidelines. See here:

I tweaked the patch a little to use a shift because large constant synthesis is tricky on some platforms. For example we can avoid the extra li (Load Immediate) on RISC-V and avoid movabs on x86_64 which embeds a large 64-bit constant in the instruction. Using sll/shl is a tiny bit smaller: