The FSF GDB port now has proper target description support, aka XML register set files. This patch copies the FSF GDB xml files into qemu to replace my temporary files. It also adds the 32-bit support and the CSR support that was missing in my first part patch.
There is one odd thing here which is that the CSR xml file lists them in documentation order not numerical order, and has both v1.9.1 and v1.10 priv spec numbers. I suspect it was generated from a binutils header file. I had to clean up the existing list of CSRs to include all of the ones that GDB expects, and I had to add a table to map the CSR xml register numbers to the hardware register numbers. This table is a little awkward. If this file changes in a future gdb version, then we will need corresponding qemu changes to match.
The FSF GDB port now has proper target description support, aka XML register set files. This patch copies the FSF GDB xml files into qemu to replace my temporary files. It also adds the 32-bit support and the CSR support that was missing in my first part patch.
There is one odd thing here which is that the CSR xml file lists them in documentation order not numerical order, and has both v1.9.1 and v1.10 priv spec numbers. I suspect it was generated from a binutils header file. I had to clean up the existing list of CSRs to include all of the ones that GDB expects, and I had to add a table to map the CSR xml register numbers to the hardware register numbers. This table is a little awkward. If this file changes in a future gdb version, then we will need corresponding qemu changes to match.