RISC-V: Use IEEE NaNs instead of default NaNs.

riscvarchive / riscv-qemu

QEMU with RISC-V (RV64G, RV32G) Emulation Support

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RISC-V: Use IEEE NaNs instead of default NaNs. #94

Closed jim-wilson closed 6 years ago

jim-wilson commented 6 years ago

Delete set_default_nan_mode call in riscv_cpu_reset.

jim-wilson commented 6 years ago

This fixes 2 glibc make check failures, and has no effect on gcc make check.

ARM has two modes, IEEE NaN mode and default NaN mode, and set_default_nan_mode enables this support for ARM. RISC-V has only IEEE NaN mode, and hence should not be using this function. When this function is called, -NaN is incorrectly converted to NaN for RISC-V.