riscvarchive / riscv-v-spec

Working draft of the proposed RISC-V V vector extension
https://jira.riscv.org/browse/RVG-122
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When the value of vstart written through the csr instruction is greater than the vlmax under the current configuration, whether the hardware can be treated as an illegal instruction to implement #904

Closed Wei-VV1995 closed 1 year ago

Wei-VV1995 commented 1 year ago

“The use of vstart values greater than the largest element index for the current SEW setting is reserved” When the value of vstart written through the csr instruction is greater than the vlmax under the current configuration, whether the hardware can be treated as an illegal instruction to implement?

aswaterman commented 1 year ago

Yeah, in general, reserved behaviors can be implemented as an illegal-instruction exception.

Wei-VV1995 commented 1 year ago

Thank you very much for your answer !

Wei-VV1995 commented 1 year ago

If vtype.vill=1, is VLMAX equal to 0? If vlamx=0, then any value configured for vstart is treated as an illegal instruction, because in this case, any vstart value is greater than the element index.

aswaterman commented 1 year ago

Duplicate of #907