This change adds support for having a trap handler (that panics) in case the kernel stack is exhausted.
RISC-V lacking double fault, we check the stack pointer at the entry of the trap handler. When this happens, we switch to an emergency frame. Since this is a panic frame, we have only one for all CPUs, and we use a simple spinlock to allocate it in case two CPUs run out of stack at the same time.
I couldn't find a way to not clobber one register of the frame, and having to choose I went for T1. I don't think this is important, the most important data we get from such a failure is: IP and stack pointer.
This change adds support for having a trap handler (that panics) in case the kernel stack is exhausted.
RISC-V lacking double fault, we check the stack pointer at the entry of the trap handler. When this happens, we switch to an emergency frame. Since this is a panic frame, we have only one for all CPUs, and we use a simple spinlock to allocate it in case two CPUs run out of stack at the same time.
I couldn't find a way to not clobber one register of the frame, and having to choose I went for T1. I don't think this is important, the most important data we get from such a failure is: IP and stack pointer.