MIL-STD-1750A or 1750A is the formal definition of a 16-bit computer instruction set architecture (ISA), including both required and optional components, as described by the military standard document MIL-STD-1750A (1980). Since August 1996 is inactive for new designs.
In addition to the core ISA, the definition defines optional instructions, such as a FPU and MMU. Importantly, the standard does not define the implementation details of a 1750A processor.
Examples of MIL-STD-1750A implementations include:
CPU Technology, Inc. CPU1750A-FB, a high performance 1750A SOC designed to give existing applications a late life performance boost.
Delco Electronics Magic V 1750 Processor
Dynex Semiconductor MAS281. A radiation hardened SOC implementation on a 64-pin multichip module with an optional MMU.
GEC-Plessey RH1750, a radiation-hardened version for aerospace and space flight applications. GEC-Plessey, under its previous incarnation as Marconi Electronic Devices, also initially developed the MAS281 and MA31750A[1] series of processors, later made available through Dynex Semiconductor
Honeywell HX1750, fabricated on Honeywell's Silicon on Insulator CMOS (SOI-IV) process giving radiation hardness. The HX1750 includes an FPU and peripherals on chip.
Johns Hopkins University Applied Physics Laboratory (JHU/APL) MIL-STD-1750AAV space flight qualified processor. A multi-board silicon on sapphire implementation specifically designed for space flight.
Marconi Electronic Devices MIL-STD-1750A.
McDonnell-Douglas MD-281. A radiation hardened SoS three die implementation on a 64-pin multichip module.
National Semiconductor F9450 series.
Pyramid Semiconductor PACE P1750A. The family includes the P1750A CPU, the P1750AE Enhanced CPU, the P1753 Memory Management Unit (MMU), the P1754 Processor Interface Chip (PIC) and the P1757ME Multi-Chip Module. This line was acquired from Performance Semiconductor in 2003.
Royal Aircraft Establishment Farnborough MIL-STD-1750A implementation in AMD 2901 bit-slice technology.[2]
MIL-STD-1750A or 1750A is the formal definition of a 16-bit computer instruction set architecture (ISA), including both required and optional components, as described by the military standard document MIL-STD-1750A (1980). Since August 1996 is inactive for new designs.
In addition to the core ISA, the definition defines optional instructions, such as a FPU and MMU. Importantly, the standard does not define the implementation details of a 1750A processor.
Examples of MIL-STD-1750A implementations include:
HX1750-Datasheet.pdf mil-std-1750a-1.7.pdf ut1750micro.pdf