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Features that would be nice to have but they are not in the roadmap
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nanoMIPS instruction set support #5

Open XVilka opened 3 years ago

XVilka commented 3 years ago

nanoMIPS™ Architecture

Designed for embedded devices, nanoMIPS is a variable lengths instruction set architecture (ISA) offering high performance in substantially reduced code size. Under comparable compiler flags, it can deliver up to 40% smaller code than MIPS32. With smaller memory accesses and efficient use of the instruction cache, nanoMIPS also helps to reduce system power consumption.

The nanoMIPS ISA combines recoded and new 16-, 32-, and 48-bit instructions to achieve an ideal balance of performance and code density. It incorporates all MIPS32 instructions and architecture modules including MIPS DSP and MIPS MT, as well as new instructions for advanced code size reduction.

nanoMIPS is supported in release 6 of the MIPS architecture. It is first implemented in the new MIPS I7200 multi-threaded multi-core processor series. Compiler support is included in the MIPS GNU-based development tools.

It is different from the "standard" instruction set.

MIPS_nanomips32_ISA_TRM_01_01_MD01247.pdf

Toolchain: https://github.com/MediaTek-Labs/nanomips-gnu-toolchain/releases QEMU TCG backend: https://www.spinics.net/linux/fedora/libvir/msg217107.html

QEMU own disassembler: https://gitlab.com/qemu-project/qemu/-/blob/master/disas/nanomips.c

See also the nmips plugin for the IDA Pro.

XVilka commented 1 year ago

MediaTek started to upstream their implementation for LLVM:

We could get the support for the Capstone auto-sync project once it's merged into the LLVM and a part of some future release. cc @Rot127

Rot127 commented 12 months ago

Perfect. If @brightprogrammer starts earlier then MediaTek, it should be pretty easy to just copy the td files with some minor modifications. This way we do not have to wait until MediaTek is done with upstreaming it (which probably takes a while.