I'm thinking to port Minimig to another FPGA board. It's much bigger FPGA, but it doesn't have SDR SDRAM. It has DDR3 instead and according to my evaluation, it cannot be used to emulate asynchronous DRAM. Thus i had to make SDRAM daughter board. Currently i'm using proto-PCB and cannot achieve 114MHz on SDRAM yet (i'm waiting for PCB designed specifically for SDRAM), but can achieve half speed 57MHz.
Since Minimig is pretty large to realize some specific requirements, i want to ask you about possibility to use a half of SDRAM speed. I see 114MHz is used only for SDRAM and TG68K.
1) Is exact 114MHz important for TG68K, or any relatively high frequency (in my case 57MHz) should be OK?
2) Can i simply set 57MHz instead of 114MHz and keep Minimig's Amiga emulation speed at least at standard 7MHz(ECS)/28MHz(AGA) timings?
It looks like all signals/clock enables in Minimig are derived from 28MHz, not 114MHz (except SDRAM and TG68K of course).
Hi, Rok.
I'm thinking to port Minimig to another FPGA board. It's much bigger FPGA, but it doesn't have SDR SDRAM. It has DDR3 instead and according to my evaluation, it cannot be used to emulate asynchronous DRAM. Thus i had to make SDRAM daughter board. Currently i'm using proto-PCB and cannot achieve 114MHz on SDRAM yet (i'm waiting for PCB designed specifically for SDRAM), but can achieve half speed 57MHz. Since Minimig is pretty large to realize some specific requirements, i want to ask you about possibility to use a half of SDRAM speed. I see 114MHz is used only for SDRAM and TG68K. 1) Is exact 114MHz important for TG68K, or any relatively high frequency (in my case 57MHz) should be OK? 2) Can i simply set 57MHz instead of 114MHz and keep Minimig's Amiga emulation speed at least at standard 7MHz(ECS)/28MHz(AGA) timings? It looks like all signals/clock enables in Minimig are derived from 28MHz, not 114MHz (except SDRAM and TG68K of course).