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rlindsberg / 1331IL-VHDL-Design

Microprocessor AR 4003
GNU General Public License v3.0
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No implementation of CLK #22

Closed rlindsberg closed 6 years ago

rlindsberg commented 6 years ago

https://github.com/rlindsberg/1331IL-VHDL-Design/blob/640d4e9feb6fb2ee436523597184e77eb610d10a/labb2/1.1/ALU.vhd#L8-L13

The port clk is left behind.