`make` - automatic variables `$<` and `$*` works inside suffixes rules only

[naksyl]

Test makefile:

all:
    @echo "Automatic variables from suffixes rule"
    @make -n AUTO=1 main.o
    @echo
    @echo "Automatic variables from regular rule"
    @make -n main.o

.c.o:
    $$< = "$<"
    $$? = "$?"
    $$@ = "$@"
    $$* = "$*"
    $$^ = "$^"

main.o: main.c common.h
ifndef AUTO
    $$< = "$<"
    $$? = "$?"
    $$@ = "$@"
    $$* = "$*"
    $$^ = "$^"
endif

main.c:
common.h:

Output:

$ make
Automatic variables from suffixes rule
$< = "main.c"
$? = "main.c common.h"
$@ = "main.o"
$* = "main"
$^ = "main.c common.h"

Automatic variables from regular rule
$< = ""
$? = "main.c common.h"
$@ = "main.o"
$* = ""
$^ = "main.c common.h"

[rmyorston]

The section on Internal Macros in POSIX states that $@, $% and $? "shall be evaluated for both target and inference rules". $< and $* are only required to be evaluated for inference rules.

busybox-w32 make is strictly enforcing the standard. It could relax this behaviour, but it would be as a non-POSIX extension.

This issue is being tracked upstream.

[naksyl]

Thanks for the answer, i was not aware of that, so I shall stick to parse $? inside shell.

[rmyorston]

make in busybox-w32 now supports $< and $* in target rules as a non-POSIX extension.

It's in the lastest prerelease binaries (PRE-5352 or above).

[rmyorston]

Support for $< and $* in target rules is available in the latest release, FRP-5398.