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robert-w-gries / rxinu

Rust implementation of Xinu educational operating system
Apache License 2.0
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The first IRQ in the interrupts field is not the cascade interrupt. #12

Closed toor closed 6 years ago

toor commented 6 years ago

Assuming the IRQs have been remapped to vector offsets 0x20 onwards, then the first IRQ at 0x20 is IRQ 0, timer interrupt. Same goes for COM1 and COM2, these do not have offsets 0x21 and 0x22 respectively. Please correct me if I am missing something here.

robert-w-gries commented 6 years ago

Thank you for raising the issue, I believe you are correct.

The patch seems easy enough, I will fix it in the master branch.

- idt.interrupts[0].set_handler_fn(irq::cascade);
- idt.interrupts[1].set_handler_fn(irq::com1);
- idt.interrupts[2].set_handler_fn(irq::com2);
+ idt.interrupts[2].set_handler_fn(irq::cascade);
+ idt.interrupts[3].set_handler_fn(irq::com2);
+ idt.interrupts[4].set_handler_fn(irq::com1);

If I may ask, how did you stumble onto this project? I'm now self-conscious that my code isn't up to par :-)

toor commented 6 years ago

I believe you opened an issue on Phil's blog, or commented? It might've been to do with the second edition.