Mismatch between documentation and Verilog for UART_CTRL[4] - Rx clock source

[m1geo]

The documentation states UART_CTRL[4]=0 uses internal baud rate generator:

However the Verilog and the 6551 datasheet show the reverse:

Importantly code remains compatible, but caused me a bit of confusion as I was working from your datasheet :) Thanks!

[robfinch]

This is just a doc issue. Docs updated, 0=external, 1 = internal baud generator