Evaluate "OH! Open Hardware for Chip Designers" to be included

rodrigomelo9 / verifying-foss-hdl-synthesizers

a project to check the FOSS synthesizers against vendors EDA tools

ISC License

12 stars 2 forks source link

Evaluate "OH! Open Hardware for Chip Designers" to be included #11

Open rodrigomelo9 opened 4 years ago

rodrigomelo9 commented 4 years ago

The repo is here. The last commit was in 2017, but it seems that there are a lot of cores which can be used to detect (or not :P) problems with Yosys (because is Verilog 2005).