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Add hardware probe model to README
#7
jhodapp
opened
3 years ago
3
wire clk_sys to pll_sys, don't set refdiv (Fixes #5)
#6
kahara
opened
3 years ago
1
Source for clk_sys is not switched to pll_sys after PLLs are set up
#5
kahara
opened
3 years ago
1
error: linking with `rust-lld` failed: exit code: 0xc0000135
#4
FrankvdStam
closed
3 years ago
1
Feat/add uart sample
#3
tacdom
opened
3 years ago
0
Either libusb-1.0 not found or no such file or directory
#2
tux7k
closed
3 years ago
2
fix(src/main.rs): Adapted to current GPIO control access
#1
tacdom
closed
3 years ago
0