rpsubc8 / ESP32TinyFake86

Port Fake86 to TTGO VGA32
Do What The F*ck You Want To Public License
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No signal in vga32 1.4 #1

Closed djogopatrao closed 1 year ago

djogopatrao commented 1 year ago

I used arduino IDE 2.1.1 do compile and upload fake86 to my vga32 version 1.4.

Arduino options were set as below. In this print you can see the final messages of the upload process.

Sem título

The VGA32 then , when plugged to a lg1721a monitor, yields no video signal.

The code used was cloned today. Git HASH is cb8f3ffd996d503a1e843bf12f98a3cbee7b3efc

rpsubc8 commented 1 year ago

There is no single way to support all monitors with all possible resolutions and modes, so many will not display correctly, but you can always fine-tune frequencies and syncs.

https://github.com/rpsubc8/ESP32TestVGA

In this repository you can test the different video modes, where you will see which ones your monitor supports in real time. There you can note the 320x200 video mode that works on your monitor. Currently ESP32TinyFake86 is only supporting bitluni's 320x200x70hz mode by code. If you want the 320x200x70hz modes from fabgl you have to wait for it to do some uploading, or just modify the vga_6bit.h code with the timings:

const int VgaMode_vga_mode_320x200[12]={ 8,48,24,320,12,2,35,400,2,12587500,0,1 };

The frequency of the PLL can also be changed: p0= 0x00AE; p1= 0x00CF; p2= 0x0004; p3= 0x0005;

djogopatrao commented 1 year ago

How can I be sure that it is booting correctly? Is there a debug pin which i can use to see log?

rpsubc8 commented 1 year ago

To see a detailed log, in the gbConfig.h file you have to uncomment the pragma #define use_lib_log_serial. The debug is at 115200 baud. If nothing comes out at startup, it may be due to problems with the PLL, which you should force to a certain value, as I said before.

Here you have all the information: https://retrowiki.es/viewforum.php?f=114

djogopatrao commented 1 year ago

The log is below, it seems to be hanging somewhere

rst:0x1 (POWERON_RESET),boot:0x12 (SPI_FAST_FLASH_BOOT) configsip: 188777542, SPIWP:0xee clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00 mode:DIO, clock div:1 load:0x3fff0018,len:4 load:0x3fff001c,len:1216 ho 0 tail 12 room 4 load:0x40078000,len:10944 load:0x40080400,len:6388 entry 0x400806b4 HEAP BEGIN 355788 HEAP BEGIN 355788

rpsubc8 commented 1 year ago

I recommend using the exact libraries and framework. Using others doesn't mean that it doesn't work, but that the higher versions consume more SRAM and can cause problems.

According to the log and as I mentioned previously, it is probably getting stuck in the PLL calibration in the ESP32 for the bitluni VGA video sequence, that is, in the call to the rtc_clk_apll_enable function.

https://retrowiki.es/viewtopic.php?f=118&t=200038367&start=64

This is a problem in several ESP32's, which even ESPRESSIF has not noticed to this day. The solution is to use other PLL values, as I mentioned.

You can do a simple test, which is to test the program: https://github.com/rpsubc8/ESP32TestVGA

If that is the problem, I will upload the video mode shortly, as I have done in other emulators.

rpsubc8 commented 1 year ago

I have added 320x200 mode support with fabgl's PLL (#define use_lib_vga320x200x70hz_fabgl). In the gbConfig.h file you have to comment out one video mode and uncomment another:

//Video mode selection //Select one mode and deselect other modes //320x200 720x400 31.4 Khz 70.0 Hz freq:25175000 pixel_clock:12587500 //#define use_lib_vga320x200x70hz_bitluni //320x200 70Hz freq:12587500 Solves PLL and VGA monitor problems

define use_lib_vga320x200x70hz_fabgl

djogopatrao commented 1 year ago

Thanks, that worked fine!

Just for the record, the modes that worked in my lg1721a: 360 x 200 x 70hz bitluni => ok 320 x 240 x 60hz bitluni => not ok 320 x 240 x 60hz fabgl => ok QVGA fabgl => ok 320 x 200 x 70 bitluni => not ok 320 x 200 x 70 fabgl => ok

rpsubc8 commented 1 year ago

I needed your help @djogopatrao, as you have a board that has a PLL calculation defect (blocking), while my boards do not have such a defect, so it is very difficult for me to perform more accurate tests.

The help consists of recompiling a simple program (vgapll.zip) which I attach below in the link and running it on your board. If everything is correct, it should display the text "Test 320x200 PLL" with the bitluni 320x200 video mode. If you could also send me the log of the output of the same program, it would be appreciated.

https://github.com/rpsubc8/ESP32TinyFake86/blob/main/preview/vgapll.zip

https://github.com/rpsubc8/ESP32TinyFake86/blob/main/preview/vgapllcustom.zip

You should try both programmes (vgapll.zip y vgapllcustom.zip). Thank you.