Closed rmsyn closed 3 weeks ago
@rmsyn that is probably a task for a crate like aarch64-rt
, this crate merely gives access to various ARM registers.
Right, we discussed working on something like aarch64-rt
in the Matrix room, but I've since had focus shifted to other work.
Would you be interested in using/working on an aarch64-rt
crate?
If I remember correctly, one of the main blockers was the lack of consistency on aarch64
SoCs (interrupts, bring-up, peripherals, etc.), and a lack of interest/time from knowledgable people.
@rmsyn aarch64-rt crate would be of little use for me, as you said the init sequences are usually specific, the interrupt vector tables I set up via a simple linker script, so there isn't much reusable pieces to land in an RT crate.
Hi, @rmsyn, I'm closing this one, if the rt
crate idea is still viable I recommend we start a separate repository for it.
Similar to cortex-m-rt, I'd like to help develop a runtime library for
aarch64-cpu
s.I've looked into some of the differences in how vector tables are setup, seems some people just use trampolines to actual interrupt/exception handlers. Not sure how to generalize that in a safe rust macro.
Is a runtime crate currently being worked on, and/or talked about?