search

rust-embedded / aarch64-cpu

Low level access to processors using the AArch64 execution state.
Apache License 2.0
73 stars 26 forks source link

Set ESR_ELX writable #15

Closed JaviMerino closed 1 year ago

JaviMerino commented 1 year ago

According to the Arm Architecture Reference Manual (DDI 0487H.a), sections C5.2.5 and C5.2.6, ESR_EL1 and ESR_EL2 can be written to. Whether the write succeeds depends on which exception level we are running in, but this is not a concern for the aarch64-cpu crate.

Implement the Writeable interface for ESR_EL1 and ESR_EL2.

nchong-at-aws commented 1 year ago

This looks good and sensible to me. It is indeed possible to MSR to ESR_ELx.