Add multiple registers and update fields

rust-embedded / aarch64-cpu

Low level access to processors using the AArch64 execution state.

Apache License 2.0

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Add multiple registers and update fields #27

Closed bitboom closed 3 weeks ago

bitboom commented 5 months ago

I added the following registers by referring here.

Added registers

CNTPOFF_EL2
CPTR_EL2
HPFAR_EL2
ICC_CTLR_EL1
ICC_SRE_EL2
ICH_AP0R_EL2
ICH_AP1R_EL2
ICH_HCR_EL2
ICH_LR_EL2
ICH_MISR_EL2
ICH_VMCR_EL2
ICH_VTR_EL2
ID_AA64AFR0_EL1
ID_AA64AFR1_EL1
ID_AA64DFR0_EL1
ID_AA64DFR1_EL1
ID_AA64ISAR1_EL1
ID_AA64PFR0_EL1
ID_AA64PFR1_EL1

Updated registers

ESL_EL1
HCR_EL2
ICH_LR0_EL2
SCTLR_EL2
VTCR_EL2

nchong-at-aws commented 3 months ago

Thanks @bitboom . I'll review your changes.

berkus commented 3 weeks ago

@bitboom some nitpicks and one factual error in bitfield offset, otherwise looking good! Please fix at least the invalid OFFSET and we can merge this. Preferably implement enum values for these wide fields, as I see you've already done in some other registers. Thanks!

bitboom commented 3 weeks ago

@bitboom some nitpicks and one factual error in bitfield offset, otherwise looking good! Please fix at least the invalid OFFSET and we can merge this. Preferably implement enum values for these wide fields, as I see you've already done in some other registers. Thanks!

@berkus Thank you for the detailed review 😄 Most of the feedback has been reflected, and I've added a comment regarding the FIPA field. Let me know if you have any further feedback.