In addition to the issue described in #499, note that the ICSR VECTACTIVE/VECTPENDING bits, as well as the similarly-encoded exception bits in the xPSR, are nine bit fields, so a From<u8> impl is not appropriate.
Screenshot from ARMv7-M:
ARMv6-M is restricted to 32 interrupts architecturally, so the result should be the same, though note that v6-M also defines these as nine bit fields. v7-M can have up to 496 interrupts so basically none of the current VectActive type is correct on that profile.
In addition to the issue described in #499, note that the ICSR VECTACTIVE/VECTPENDING bits, as well as the similarly-encoded exception bits in the xPSR, are nine bit fields, so a
From<u8>impl is not appropriate.Screenshot from ARMv7-M:
ARMv6-M is restricted to 32 interrupts architecturally, so the result should be the same, though note that v6-M also defines these as nine bit fields. v7-M can have up to 496 interrupts so basically none of the current
VectActivetype is correct on that profile.