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rust-embedded / riscv

Low level access to RISC-V processors
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`riscv-rt`: Implement FPU initialization #166

Closed mini-ninja-64 closed 8 months ago

mini-ninja-64 commented 9 months ago

This PR adds FPU initialization when compiling with the f or d extensions, for the implementation of this I have updated the parse_target function from build.rs to support additional extensions, this is required until this crate is updated to rust 1.75 at which point we can use target_feature.

I added a little macro to help with zeroing registers, if it is preferable though happy to inline the zeroing of registers

I am new to rust & risc-v in general so apologies if there is any obvious mistakes that have been made, your feedback is greatly appreciated.

closes: #157

romancardenas commented 9 months ago

Thanks! I'll review your PR ASAP

mini-ninja-64 commented 8 months ago

wooo, thank you so much ☺️