`riscv`: Support more fence variants

rust-embedded / riscv

Low level access to RISC-V processors

818 stars 160 forks source link

`riscv`: Support more fence variants #193

Open jsgf opened 5 months ago

jsgf commented 5 months ago

The default fence instruction with no parameters is the strongest form of barrier. But it also takes an optional set of flags to give fine-grained control over exactly what operations the fence is a barrier for, and in which direction.

I see two design choices here:

just let the caller specify an arbitrary set of flags (somehow), or
have a set of canned variants for the common cases (like Linux's rmb/wmb/...)

(These aren't exclusive of course.)

Thoughts?

cc @dreiss

romancardenas commented 5 months ago

Hi! I need to think more about this, but currently, I think that riscv should support common cases. For very specific scenarios, developers could always use inline assembly.