M302: Size of Register must be 8, 16 or 32 Bits

[kossnikita]

From CMSIS SVDConv docs

Message Number | Type | Message Text -- | -- | -- M302 | ERROR | Size of Register 'NAME':'NUM' must be 8, 16 or 32 Bits

This limitation is not obvious to me. For example, it is easier to create a 12-bit register for a 12-bit ADC than a 32-bit register with only one field. svd2rust handles this by creating an unsafe method for working with such registers. But CMSIS prohibits such svd files. Should utilities handle this error?

[kossnikita]

I think this issue for rust-embedded/svd. Feel free to move it.

[burrbull]

This limitation is not obvious to me. For example, it is easier to create a 12-bit register for a 12-bit ADC than a 32-bit register with only one field.

Register is how CPU reads/writes memory. It does it by u8,u16,u32, u64 depending on architecture. Even if it physically only 12 lines are connected to register mapped on memory. Field is abstraction which you can push/pop from register.

[burrbull]

P.S. Even if you create u8 or u16 register on 32-bit arch, first you need to check in reference manual can this register or all registers of peripheral be manipulated in byte or word mode

[kossnikita]

Do you mean that there are modes in which the processor can read or write registers differently? I thought that the data bus always has a fixed width. For example, a 32bit processor will always read/write all 32bits.

[burrbull]

Do you mean that there are modes in which the processor can read or write registers differently?

Yes (at least for ARM), depending on asm command you are using to read/write register microprocessor can react differently.

Usually this is allowed for data registers, for example SPI DR, TIM ARR, etc. This is what <size> tag about.

[kossnikita]

Thank you, it's clear now. So should introduce this limitation into the svdtool or into the svd?

[burrbull]

Yes, make sense in svd.

[burrbull]

related to #247