Closed sethp closed 1 year ago
I hope this is backward compatible?
Oh, great point: the code generator changes are in the sense that passing None
for that parameter (or not setting a value, which should default to None
) doesn't change the generated code.
Using the new parameter may not be backwards compatible, depending on what link section is being set: as long as the new section gets output in some part of the resulting binary it sure could be, but it's somewhat easy to rely on a particular layout, either accidentally or on purpose.
bors r+
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This change introduces a new config field that allows
svd2rust
to target which linker sections get assigned to the__INTERRUPTS
static, with reasonable defaults.Previously on RISC-V, the choice was always left up to the compiler, and it seemed to always pick
.rodata
. Unfortunately, in my context, that meant placing the LUT in a memory range that had a lot of highly variable latency, which cost not just time but predictability in servicing interrupts.With this change in place, I'm able to target a particular section (e.g.
.data
, or.trap.rodata
) for the placement of the static, which grants more granular control over the ultimate loaded memory address.For the full details about the problem, please see: https://github.com/esp-rs/esp-hal/pull/534/commits/e29f3d547dc210e1b73313be6053a2122239a467