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rust-lang / rustc_codegen_cranelift

Cranelift based backend for rustc
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missing avx2 intrinsics #1419

Open lu-zero opened 1 year ago

lu-zero commented 1 year ago

Current rav1e master shows:

warning: unsupported x86 llvm intrinsic llvm.x86.avx2.pabs.w; replacing with trap

warning: unsupported x86 llvm intrinsic llvm.x86.avx2.pmadd.wd; replacing with trap

warning: unsupported x86 llvm intrinsic llvm.x86.avx2.psign.w; replacing with trap

warning: unsupported x86 llvm intrinsic llvm.x86.avx2.psrlv.d.256; replacing with trap

warning: unsupported x86 llvm intrinsic llvm.x86.avx2.packssdw; replacing with trap

warning: unsupported x86 llvm intrinsic llvm.x86.avx2.gather.d.d.256; replacing with trap

warning: unsupported x86 llvm intrinsic llvm.x86.avx.cvtdq2.ps.256; replacing with trap

warning: unsupported x86 llvm intrinsic llvm.x86.avx2.psllv.d.256; replacing with trap

warning: unsupported x86 llvm intrinsic llvm.x86.avx2.psrav.d.256; replacing with trap

warning: unsupported x86 llvm intrinsic llvm.x86.sse2.packssdw.128; replacing with trap
bjorn3 commented 1 year ago

Some of these (but not all) should have been implemented by https://github.com/rust-lang/rustc_codegen_cranelift/pull/1417 which hasn't landed on rustc nightly yet.

lu-zero commented 1 year ago

Yes :) I tested with the current master and the list is shorter:

warning: unsupported x86 llvm intrinsic llvm.x86.avx2.pabs.w; replacing with trap

warning: unsupported x86 llvm intrinsic llvm.x86.avx2.psign.w; replacing with trap

warning: unsupported x86 llvm intrinsic llvm.x86.avx2.psrlv.d.256; replacing with trap

warning: unsupported x86 llvm intrinsic llvm.x86.avx2.psllv.d.256; replacing with trap

warning: unsupported x86 llvm intrinsic llvm.x86.avx2.psrav.d.256; replacing with trap

warning: unsupported x86 llvm intrinsic llvm.x86.avx.cvtdq2.ps.256; replacing with trap

warning: unsupported x86 llvm intrinsic llvm.x86.avx2.gather.d.d.256; replacing with trap
bjorn3 commented 11 months ago

The gather intrinsics are now implemented on the even_more_simd_intrinsics branch.

MrFoxPro commented 8 months ago

I'm getting warning unsupported x86 llvm intrinsic llvm.x86.avx2.psllv.d.256; replacing with trap and invocation of image-rs crate (avif encoder) results in crash:

trap at Instance { def: Item(DefId(2:15232 ~ core[a9f5]::core_arch::x86::avx2::_mm256_sllv_epi32)), args: [] } (_ZN4core9core_arch3x864avx217_mm256_sllv_epi3217h96c8b42e4aa5b850E): llvm.x86.avx2.psllv.d.256
svix-jplatte commented 6 months ago

I don't see permd listed above, but this is the same issue right?

trap at Instance { def: Item(DefId(1:15384 ~ core[212b]::core_arch::x86::avx2::_mm256_permutevar8x32_epi32)), args: [] } (_ZN4core9core_arch3x864avx227_mm256_permutevar8x32_epi3217h294fc7d72ae002f8E): llvm.x86.avx2.permd

Would be nice if there was a codegen_backend cfg so I could conditionally ignore the test that triggers this.

folkertdev commented 6 months ago

I just added permd in https://github.com/rust-lang/rustc_codegen_cranelift/pull/1491 (cc @svix-jplatte)

that PR is also a good template for if someone wants to add other avx2 intrinsics. Cranelift does not support values that wide (currently, not sure if it ever will) so the implementation will have to kind of simulate what the instruction does.

svix-jplatte commented 6 months ago

For that to become available via rustup, this repo needs to be synced into https://github.com/rust-lang/rust again, right?

bjorn3 commented 6 months ago

Correct, I can do that later today.

svix-jplatte commented 6 months ago

Thanks, yesterday's nightly has support! I'm now also running into a llvm.x86.avx2.psllv.d.256 trap like MrFoxPro with the other one fixed :smile: