rust-lang / rustc_codegen_cranelift

Cranelift based backend for rustc
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Failed to assemble on macOS #1544

Open thewh1teagle opened 1 week ago

thewh1teagle commented 1 week ago

macOS aarch64 m1

cargo new project
cd project
cargo add half
CARGO_PROFILE_DEV_CODEGEN_BACKEND="cranelift" cargo +nightly build -Zcodegen-backend

Error:

```console Compiling cfg-if v1.0.0 Compiling half v2.4.1 error: invalid operand for instruction | note: instantiated into assembly here --> :8:9 | 8 | ldr v1, [x19, 0x0] | ^ error: invalid operand for instruction | note: instantiated into assembly here --> :10:9 | 10 | str v0, [x19, 0x0] | ^ error: invalid operand for instruction | note: instantiated into assembly here --> :22:9 | 22 | ldr v1, [x19, 0x0] | ^ error: invalid operand for instruction | note: instantiated into assembly here --> :24:9 | 24 | str v0, [x19, 0x0] | ^ error: invalid operand for instruction | note: instantiated into assembly here --> :36:9 | 36 | ldr v1, [x19, 0x0] | ^ error: invalid operand for instruction | note: instantiated into assembly here --> :38:9 | 38 | str v0, [x19, 0x0] | ^ error: invalid operand for instruction | note: instantiated into assembly here --> :50:9 | 50 | ldr v1, [x19, 0x0] | ^ error: invalid operand for instruction | note: instantiated into assembly here --> :51:9 | 51 | ldr v2, [x19, 0x10] | ^ error: invalid operand for instruction | note: instantiated into assembly here --> :55:9 | 55 | str v1, [x19, 0x0] | ^ error: aborting due to 9 previous errors error: Failed to assemble `.globl ___inline_asm_half__271c5a82f56fe67a_cgu__0_n0 ___inline_asm_half__271c5a82f56fe67a_cgu__0_n0: stp fp, lr, [sp, #-32]! mov fp, sp str x19, [sp, #24] mov x19, x0 ldr v1, [x19, 0x0] fcvt s0, h1 str v0, [x19, 0x0] ldr x19, [sp, #24] ldp fp, lr, [sp], #32 ret .globl ___inline_asm_half__271c5a82f56fe67a_cgu__0_n1 ___inline_asm_half__271c5a82f56fe67a_cgu__0_n1: stp fp, lr, [sp, #-32]! mov fp, sp str x19, [sp, #24] mov x19, x0 ldr v1, [x19, 0x0] fcvt h0, s1 str v0, [x19, 0x0] ldr x19, [sp, #24] ldp fp, lr, [sp], #32 ret .globl ___inline_asm_half__271c5a82f56fe67a_cgu__0_n2 ___inline_asm_half__271c5a82f56fe67a_cgu__0_n2: stp fp, lr, [sp, #-32]! mov fp, sp str x19, [sp, #24] mov x19, x0 ldr v1, [x19, 0x0] fcvtn v0.4h, v1.4s str v0, [x19, 0x0] ldr x19, [sp, #24] ldp fp, lr, [sp], #32 ret .globl ___inline_asm_half__271c5a82f56fe67a_cgu__0_n3 ___inline_asm_half__271c5a82f56fe67a_cgu__0_n3: stp fp, lr, [sp, #-32]! mov fp, sp str x19, [sp, #24] mov x19, x0 ldr v1, [x19, 0x0] ldr v2, [x19, 0x10] fcvtn v0.2s, v1.2d fcvtn2 v0.4s, v2.2d fcvtn v1.4h, v0.4s str v1, [x19, 0x0] ldr x19, [sp, #24] ldp fp, lr, [sp], #32 ret ` error: could not compile `half` (lib) due to 1 previous error ```

cargo build and cargo +nightly build works fine.

bjorn3 commented 4 days ago

Looks like on arm64 rustc will emit register names like v1 when no modifier is passed, while arm64 assembly requires specifying the width of the register like q1. https://github.com/rust-lang/rust/blob/0b1bf71a71c2a1d34c212285362530ec2c4e4775/compiler/rustc_target/src/asm/aarch64.rs#L207, https://github.com/rust-lang/rust/blob/0b1bf71a71c2a1d34c212285362530ec2c4e4775/compiler/rustc_codegen_llvm/src/asm.rs#L605