Open antoyo opened 10 months ago
@antoyo hello mate, can u give more details about this issue?
Done.
Done.
By done do you mean the information you already gave?
Yeah, I added some info. Feel free to ask any questions if you need more help.
I'm lost searching for info, the architectures for LLVM it seems that are these: https://llvm.org/docs/CompilerWriterInfo.html#abi
I dont know if im wrong, so i have to map all those architectures to something like this: https://gcc.gnu.org/onlinedocs/gcc/x86-Options.html because here there is the options for the -march for gcc
The GCC link seems good, but you'll need to check the Options page for all targets.
For LLVM, it seems you could get the info by running this command to get the list of targets:
llc --version
and then a command like this to get the arches available on a specific target (here mips
):
llc -march=mips -mattr=help
(the arches will be at the top)
However, I'm not sure how this mapping will work with regards to -mcpu
that must sometimes be used from what I understand.
I have to run those commands inside of the rustc_codegen_gcc project?
The GCC link seems good, but you'll need to check the Options page for all targets.
For LLVM, it seems you could get the info by running this command to get the list of targets:
llc --version
and then a command like this to get the arches available on a specific target (here
mips
):llc -march=mips -mattr=help
(the arches will be at the top)
However, I'm not sure how this mapping will work with regards to
-mcpu
that must sometimes be used from what I understand.
No, those are commands from LLVM, so it can be anywhere.
As i understand, i have to map LLVM to all these architectures: https://gcc.gnu.org/onlinedocs/gcc/#toc-GCC-Command-Options Please take a look.
So, when i ran this llc --version
I have this:
Ubuntu LLVM version 14.0.0
Optimized build.
Default target: x86_64-pc-linux-gnu
Host CPU: znver1
Registered Targets:
aarch64 - AArch64 (little endian)
aarch64_32 - AArch64 (little endian ILP32)
aarch64_be - AArch64 (big endian)
amdgcn - AMD GCN GPUs
arm - ARM
arm64 - ARM64 (little endian)
arm64_32 - ARM64 (little endian ILP32)
armeb - ARM (big endian)
avr - Atmel AVR Microcontroller
bpf - BPF (host endian)
bpfeb - BPF (big endian)
bpfel - BPF (little endian)
hexagon - Hexagon
lanai - Lanai
m68k - Motorola 68000 family
mips - MIPS (32-bit big endian)
mips64 - MIPS (64-bit big endian)
mips64el - MIPS (64-bit little endian)
mipsel - MIPS (32-bit little endian)
msp430 - MSP430 [experimental]
nvptx - NVIDIA PTX 32-bit
nvptx64 - NVIDIA PTX 64-bit
ppc32 - PowerPC 32
ppc32le - PowerPC 32 LE
ppc64 - PowerPC 64
ppc64le - PowerPC 64 LE
r600 - AMD GPUs HD2XXX-HD6XXX
riscv32 - 32-bit RISC-V
riscv64 - 64-bit RISC-V
sparc - Sparc
sparcel - Sparc LE
sparcv9 - Sparc V9
systemz - SystemZ
thumb - Thumb
thumbeb - Thumb (big endian)
ve - VE
wasm32 - WebAssembly 32-bit
wasm64 - WebAssembly 64-bit
x86 - 32-bit X86: Pentium-Pro and above
x86-64 - 64-bit X86: EM64T and AMD64
xcore - XCore
So, i have to check each of those architectures, using -march=arch
. For mips
i get this:
llc -march=mips -mattr=help
Available CPUs for this target:
generic - Select the generic processor.
mips1 - Select the mips1 processor.
mips2 - Select the mips2 processor.
mips3 - Select the mips3 processor.
mips32 - Select the mips32 processor.
mips32r2 - Select the mips32r2 processor.
mips32r3 - Select the mips32r3 processor.
mips32r5 - Select the mips32r5 processor.
mips32r6 - Select the mips32r6 processor.
mips4 - Select the mips4 processor.
mips5 - Select the mips5 processor.
mips64 - Select the mips64 processor.
mips64r2 - Select the mips64r2 processor.
mips64r3 - Select the mips64r3 processor.
mips64r5 - Select the mips64r5 processor.
mips64r6 - Select the mips64r6 processor.
octeon - Select the octeon processor.
octeon+ - Select the octeon+ processor.
p5600 - Select the p5600 processor.
And check each of that options to see if they have the same name in gcc architecture. To do something like this:
fn arch_to_gcc(name: &str) -> &str { match name { "M68020" => "68020", "mips1" => "mips1", "mips2" => "mips2", "mips3" => "mips3", _ => name, } }
Am i right?
Yeah, except that you don't need the cases if the name is the same, e.g. you can remove "mips1" => "mips1", "mips2" => "mips2", "mips3" => "mips3
.
For -march=aarch64
there is a64fx
. In these options: https://gcc.gnu.org/onlinedocs/gcc/AArch64-Options.html
a64fx
is for -mtune
. If they are using in GCC something different as -march
and it has the same name, i dont have to add it right?
That's a good question. Not sure how (and if) we should handle -mcpu
and -mtune
.
LLVM uses different values for the
-march
flag compared to GCC, so we need a mapping between the two. This issue is about completing this mapping.https://github.com/rust-lang/rustc_codegen_gcc/blob/7425c560d3e53eb34fbdf8979981566ab8b344d1/src/gcc_util.rs#L201-L206