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Crate Addition Request: volatile-memory #27

Closed bonzini closed 5 years ago

bonzini commented 5 years ago

Crate Name

volatile-memory

Short Description

The volatile-memory crate provides abstractions for memory that can be modified at the same time by the hypervisor and the guest. It includes the Bytes, DataInit and VolatileMemory traits, and also tools to handle endian representations of integer types.

Why is this crate relevant to the rust-vmm project?

This crate is extracted from memory-model (issue #22). The same abstractions can be used to implement for example ring buffers that are shared across processes, so it is not specific to virtualization and can be separated.

bonzini commented 5 years ago

The initial proposed code is at https://github.com/bonzini/memory-model/tree/volatile-memory

jiangliu commented 5 years ago

+1 I would be helpful to extract out these common memory access traits.

jiangliu commented 5 years ago

Seems data_init.rs is missing from https://github.com/bonzini/memory-model/tree/v2

bonzini commented 5 years ago

Nope, this won't work due to

impl<T: GuestMemory> Bytes<GuestAddress> for T {
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ type parameter `T` must be used as the type parameter for some local type

:(

dagrh commented 5 years ago

Why have Address and AddressValue got different subsets of Ord/PartialOrd - I suspect if you've got Ord you don't need PartialOrd; also PartialOrd says it r equiers PartialEq; similarly why has AddressValue got Add/Sub but Address hasn't?

in volatile_memory I wonder whether the region_end checks work where offset+count=2^64 - it feels in most of the uses we want them to, but it feels like reg ion_end will overflow?

425: Write a slice at offset 256 - looks like it's writing it at 1020 - and purposely hitting the end? (and the read below it)- looks like a few of those have been copied/pasted and then the example changed.

jiangliu commented 5 years ago

On Feb 27, 2019, at 2:13 AM, Dr. David Alan Gilbert <notifications@github.com mailto:notifications@github.com> wrote:

Why have Address and AddressValue got different subsets of Ord/PartialOrd - I suspect if you've got Ord you don't need PartialOrd; also PartialOrd says it r equiers PartialEq; similarly why has AddressValue got Add/Sub but Address hasn't?

Good point, needs to clean up the super traits. For Add/Sub, it’s due to that we need to use +/- operators on AddressValue but doesn’t support +/- operators on Address. Current design of Address trait is: 1) does not support operators 2) with an exception of the special cases: Address BitAnd/BitOr Address::Value in volatile_memory I wonder whether the region_end checks work where offset+count=2^64 - it feels in most of the uses we want them to, but it feels like reg ion_end will overflow?

Careful audit is needed about overflowing cases once we reach agreements about the interface design.

425: Write a slice at offset 256 - looks like it's writing it at 1020 - and purposely hitting the end? (and the read below it)- looks like a few of those have been copied/pasted and then the example changed.

Most code are copied&pasted from crosvm and firecracker with minor modifications, so I will try to clean up it.

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