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s117 / anycore-riscv

The AnyCore toolset targetting the RISC-V ISA
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Upgrade the riscv-gnu-toolchain from 4.9.2 to 9.2.0 #1

Closed s117 closed 4 years ago

s117 commented 4 years ago

The goal is to bring the newer GCC to our existed research infrastructure. I think I would better not upgrade the ISA, so our existed tools can benefit from this with zero modification.

Fortunately, the RV64 IMAFD user ISA didn't change much since v2.0 (which Anycore system is based on), so the userspace code generated by the new toolchain shouldn't have too much ISA compatibility issue.

However, the RISCV privileged ISA was not frozen when the Anycore system was created, and the privileged ISA has undergone some big changes with years of development, like new HTIF communication method (HTIF registers shifted from CSR to MMIO), obsoleted 8K paging scheme, new CSR mapping scheme, new encoding for some privileged instructions (like sret). The good news is the privileged ISA is mainly interfaced with Proxy Kernel. So I decided to keep our current PK, with some compatibility patch, in this upgrade.

I picked this version of RISCV GNU Toolchain because it is the one used in chipyard master branch. I guess it should be stable enough.

s117 commented 4 years ago

The newlib toolchain is available by commit c56507b.

s117 commented 4 years ago

Bugfix for newlib toolchain #2

s117 commented 4 years ago

Bugfix for newlib toolchain #3

s117 commented 4 years ago

Bugfix for newlib toolchain #7