Closed s117 closed 4 years ago
But statically allocating 512 fds & files results in an almost oversized kernel (end at 0x2000+0xdefc=0xfefc, very close to 0x10000, the planned kernel boundary)
$ riscv64-unknown-linux-gnu-objdump -p pk
pk: file format elf64-littleriscv
Program Header:
LOAD off 0x0000000000002000 vaddr 0x0000000000002000 paddr 0x0000000000002000 align 2**13
filesz 0x000000000000bb88 memsz 0x000000000000defc flags rwx
If I choose to increase the fds & files in this way, a future PK change can easily make the kernel oversize. The space reserved for fds & files must be allocated dynamically.
Updated PK to reserve a space for 1024 fds & files near the max_addr
https://github.com/s117/riscv-pk/commit/ef6c7f8c7900212960ca9f3204cf3e3be996b0a6
482.sphinx3_ref
finished with the 1024 fds & files patch.
$ spike -m2048 pk -c ./sphinx_livepretend_base.riscv ctlfile . args.an4
Requesting target memory 0x80000000
******* Resetting core **********
****Initializing the processor system****
******* Resetting core **********
******* Resetting core **********
****Initialization complete****
INFO: spec_main_live_pretend.c(120): Processing 24 beamsets
INFO: cmd_ln.c(276): Parsing command line:
INFO: kbcore.c(95): Initializing core models:
INFO: logs3.c(99): Initializing logbase: 1.000300e+00 (add table: 1)
......
35200 samples in ./cen8-fvap-b.raw will be decoded in blocks of 2000
38400 samples in ./cen8-marh-b.raw will be decoded in blocks of 2000
46400 samples in ./cen8-mdms2-b.raw will be decoded in blocks of 2000
40000 samples in ./cen8-menk-b.raw will be decoded in blocks of 2000
44800 samples in ./cen8-miry-b.raw will be decoded in blocks of 2000
28800 samples in ./cen8-mjgm-b.raw will be decoded in blocks of 2000
36800 samples in ./cen8-mjwl-b.raw will be decoded in blocks of 2000
36800 samples in ./cen8-mmxg-b.raw will be decoded in blocks of 2000
INFO: spec_main_live_pretend.c(172): Beam= -460509, PBeam= -460509, WBeam= -230254, SVQBeam= -153503
INFO: feat.c(971): Feature buffers initialized to 256 vectors
INFO: cmn_prior.c(72): mean[0]= 12.00, mean[1..12]= 0.0
Backtrace(an391-mjwl-b)
LatID SFrm EFrm AScr LScr Type
40 0 35 -200885 -74100 -1 <sil>
398 36 62 -700690 -148846 0 EIGHTY
1181 63 97 -628933 -74100 -1 <sil>
1502 98 127 -448924 -148846 0 NINE
1620 128 135 -203707 -74100 -1 <sil>
1977 136 152 -237933 -148846 0 EIGHT
2436 153 197 -734671 -74100 -1 <sil>
2438 198 198 0 -148846 0 </s>
0 198 -3155743 -891784 (Total)
FWDVIT: 'EIGHTY NINE EIGHT ' (an391-mjwl-b)
FWDXCT: an391-mjwl-b S 0 T -4047527 A -3155743 L -891784 0 -200885 -74100 <sil> 36 -700690 -148846 EIGHTY 63 -628933 -74100 <sil> 98 -448924 -148846 NINE 128 -203707 -74100 <sil> 136 -237933 -148846 EIGHT 153 -734671 -74100 <sil> 198
INFO: utt.c(337): 198 frm; 1601 sen, 10116 gau/fr, Sen 0.00 CPU 0.00 Clk [Ovrhd 0.00 CPU 0.00 Clk]; 739 hmm, 12 wd/fr, 0.00 CPU 0.00 Clk (an391-mjwl-b)
INFO: utt.c(375): HMMHist[0..0](an391-mjwl-b): 16(8)
INFO: lm.c(823): 0 tg(), 0 tgcache, 0 bo; 0 fills, 0 in mem (0.0%)
INFO: lm.c(826): 28182 bg(), 28178 bo; 1 fills, 1 in mem (50.0%)
Backtrace(an392-mjwl-b)
LatID SFrm EFrm AScr LScr Type
41 0 35 -311054 -74100 -1 <sil>
274 36 71 -391417 -148846 0 REPEAT
287 72 80 -113156 -74100 -1 <sil>
289 81 81 0 -148846 0 </s>
0 81 -815627 -445892 (Total)
...
FWDXCT: cen8-mmxg-b S 0 T -3984874 A -2645906 L -1338968 0 -191226 -74100 <sil> 34 -105126 -148846 I 45 -376620 -148846 TWO 63 -233196 -148846 R 71 -232359 -148846 TWENTY 97 -438214 -148846 FOUR 137 -26732 -74100 <sil> 140 -471727 -148846 NINETEEN 181 -570706 -148846 SEVENTY 231
INFO: utt.c(337): 231 frm; 482 sen, 1559 gau/fr, Sen 0.00 CPU 0.00 Clk [Ovrhd 0.00 CPU 0.00 Clk]; 93 hmm, 1 wd/fr, 0.00 CPU 0.00 Clk (cen8-mmxg-b)
INFO: utt.c(375): HMMHist[0..0](cen8-mmxg-b): 8(3)
INFO: lm.c(823): 0 tg(), 0 tgcache, 0 bo; 0 fills, 0 in mem (0.0%)
INFO: lm.c(826): 339 bg(), 336 bo; 0 fills, 1 in mem (50.0%)
INFO: live.c(354): SUMMARY: 759765 fr; 792 sen, 3345 gau/fr, 0.00 xCPU [0.00 xOvrhd]; 262 hmm/fr, 4 wd/fr, 0.00 xCPU;
cycle = 3506418276226
instret = 3506418276233
******* Resetting core **********
628.pop2_s_ref
also finished with the 1024 fds & files patch.
$ spike -m16384 pk -c speed_pop2_base.riscv-m64
Requesting target memory 0x400000000
******* Resetting core **********
****Initializing the processor system****
******* Resetting core **********
******* Resetting core **********
****Initialization complete****
(seq_comm_setcomm) initialize ID ( 7 GLOBAL ) pelist = 0 0 1 ( npes = 1) ( nthreads = 1)
(seq_comm_setcomm) initialize ID ( 2 ATM ) pelist = 0 0 1 ( npes = 1) ( nthreads = 1)
(seq_comm_setcomm) initialize ID ( 1 LND ) pelist = 0 0 1 ( npes = 1) ( nthreads = 1)
(seq_comm_setcomm) initialize ID ( 4 ICE ) pelist = 0 0 1 ( npes = 1) ( nthreads = 1)
(seq_comm_setcomm) initialize ID ( 5 GLC ) pelist = 0 0 1 ( npes = 1) ( nthreads = 1)
(seq_comm_setcomm) initialize ID ( 3 OCN ) pelist = 0 0 1 ( npes = 1) ( nthreads = 1)
(seq_comm_setcomm) initialize ID ( 6 CPL ) pelist = 0 0 1 ( npes = 1) ( nthreads = 1)
(seq_comm_joincomm) initialize ID ( 8 CPLATM ) join IDs = 6 2 ( npes = 1) ( nthreads = 1)
(seq_comm_joincomm) initialize ID ( 9 CPLLND ) join IDs = 6 1 ( npes = 1) ( nthreads = 1)
(seq_comm_joincomm) initialize ID ( 10 CPLICE ) join IDs = 6 4 ( npes = 1) ( nthreads = 1)
(seq_comm_joincomm) initialize ID ( 11 CPLOCN ) join IDs = 6 3 ( npes = 1) ( nthreads = 1)
(seq_comm_joincomm) initialize ID ( 12 CPLGLC ) join IDs = 6 5 ( npes = 1) ( nthreads = 1)
(seq_comm_printcomms) ID layout : global pes vs local pe for each ID
gpe LND ATM OCN ICE GLC CPL GLOBAL CPLATM CPLLND CPLICE CPLOCN CPLGLC nthrds
--- ------ ------ ------ ------ ------ ------ ------ ------ ------ ------ ------ ------ ------
0 : 0 0 0 0 0 0 0 0 0 0 0 0 1
(t_initf) Read in prof_inparm namelist from: drv_in
MCT::m_Router::initp_: GSMap indices not increasing...Will correct
MCT::m_Router::initp_: RGSMap indices not increasing...Will correct
MCT::m_Router::initp_: RGSMap indices not increasing...Will correct
MCT::m_Router::initp_: GSMap indices not increasing...Will correct
cycle = 26335209160215
instret = 26335209160222
******* Resetting core **********
Commit d0401da incorporated this patch.
The binary is compiled by the Linux Toolchain https://github.com/s117/riscv-gnu-toolchain/commit/d0bdaa9a282a32cc68e6203098dc1162021ceba7
However, the file
cen8-menk-b.raw
does exist in CWD, with correct permission.