Open reteprelief opened 8 years ago
The following component categories can have virtual bus access features: bus, virtual bus, memory, device, processor, virtual processor, system, and abstract. Access connections for virtual buses can be directional or bi-directional.
see osate/osate2-core#674 for implementation.
Issue: AADL specification does not allow to use BUS and VIRTUAL BUS to describe interactions between ARINC-653 partitions (virtual processor), e.g. throughput of messages between partitions.
Proposed correction: Provide the ability to declare Requires Bus Access and Requires Virtual Bus Access in components of category VIRTUAL PROCESSOR