sahandKashani / SoC-FPGA-Design-Guide

Tutorial for using the DE1-SoC/DE0-Nano-SoC boards for bare-metal and linux programming
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/sys/class/fpga_bridge empty directory #10

Closed nuraalkhateeb closed 7 years ago

nuraalkhateeb commented 7 years ago

Hi Sahand,

Do you get any of the bridges to show up in /sys/class/fpga_bridge? Currently, that directory is empty but when I look at my other sd card with Terasic's image, the bridges exist.

sahandKashani commented 7 years ago

Hi,

No, the directory is not empty on my side. Here is what I have:

sahand@DE0-Nano-SoC:~$ ls /sys/class/
bdi           gpio         leds      mtd        rtc          spidev
block         hwmon        mdio_bus  net        scsi_device  tty
fpga_bridge   i2c-adapter  mem       pps        scsi_disk    udc
fpga_manager  i2c-dev      misc      ptp        scsi_host    vc
fpga_region   input        mmc_host  regulator  spi_master   vtconsole

sahand@DE0-Nano-SoC:~$ ls /sys/class/fpga_bridge/
br0  br1

sahand@DE0-Nano-SoC:~$ ls /sys/class/fpga_bridge/br0/
device  name  of_node  power  state  subsystem  uevent

sahand@DE0-Nano-SoC:~$ ls /sys/class/fpga_bridge/br1/
device  name  of_node  power  state  subsystem  uevent
nuraalkhateeb commented 7 years ago

Wow! Would you have any ideas why mine would be empty? I tried using the device tree you used in the tutorial and another one that I've been using and got the same results. Would an issue like this be from the device tree or something else?

Thanks Sahand

nuraalkhateeb commented 7 years ago

I noticed that I'm missing some boot messages that you get.

[ 1.432987] fpga_manager fpga0: Altera SOCFPGA FPGA Manager registered [ 1.439884] altera_hps2fpga_bridge ff400000.fpga_bridge: fpga bridge [lwhps2fpga] registered [ 1.448516] altera_hps2fpga_bridge ff500000.fpga_bridge: fpga bridge [hps2fpga] registered [ 1.457125] fpga-region soc:base_fpga_region: FPGA Region probed [ 1.463383] oprofile: no performance counters [ 1.467821] oprofile: using timer interrupt.

I don't see the messages saying that the bridges got registered.

[ 1.305363] fpga_manager fpga0: Altera SOCFPGA FPGA Manager registered [ 1.312359] oprofile: no performance counters [ 1.316815] oprofile: using timer interrupt.

sahandKashani commented 7 years ago

The device tree just indicates what hardware is available on the board, so these messages are not coming from the device tree itself. A driver is instantiated depending on the elements found in the device tree.

Where are you getting your linux kernel image from? It looks like your kernel does not have the required drivers to make the bridges appear, so I suspect you are probably using the mainline linux kernel.

From what I recall, the mainline linux kernel on github does not have all the drivers for the various peripherals of Cyclone V chips. I had to use Altera's upstream linux repository to have these drivers.

nuraalkhateeb commented 7 years ago

I recall using the same linux kernel you were using.

git clone \ https://github.com/altera-opensource/linux-socfpga.git \ DE1_SoC_demo/sw/hps/linux/source

git checkout ffea805b5209e0e6ad8645217f5ab742455a066b

Do I need to be cloning something else for the linux kernel?

nuraalkhateeb commented 7 years ago

I re-created zImage from the commands above but I still get the same results and nothing in /sys/class/fpga_bridge. Your zImage was created from the commands above as well, correct?

nuraalkhateeb commented 7 years ago

Sahand,

I ran the command

$ make socfpga_cyclone5_socdk.dtb

and copied that device tree to my sdcard. This does show br0 and br1 under the fpga bridges. Before I was taking the device tree but without running the 'make' command, so I'm not sure if that was the problem.

Thanks Sahand.

sahandKashani commented 7 years ago

git checkout ffea805b5209e0e6ad8645217f5ab742455a066b That is the indeed the correct commit to checkout.

It looks like you were taking the device tree source before, but linux uses a binary version at runtime which needs to be compiled before used. That is what the make socfpga_cyclone5_socdk.dtb was for.

$ make socfpga_cyclone5_socdk.dtb

From your previous messages, I believe you are using the DE0-Nano-SoC, correct? If so, note that I've uploaded a second version of the tutorial specifically for that board. 99% of it is identical, but some commands are slightly different. For example, the DE0-Nano-SoC version of the tutorial uses make socfpga_cyclone5_de0_sockit.dtb instead of the version you used (from the DE1-SoC version of the tutorial).