The first issue is that it's loading bits from the LSB - so the final byte will be reversed. It should be loading from the MSB and shifting right.
The second issue I found when experimenting, is that in practice the start bit delay was too short - this resulted in the received byte being 4x as large (truncated) as the intended value (when the first issue was accounted for). Adding 2 extra delay periods in the start bit seemed to fix this. Please see if you can reproduce this problem as it may just be my equipment.
fn read(&mut self) -> nb::Result<u8, Self::Error> {
let mut data_in = 0;
// wait for start bit
while self.rx.is_high().map_err(Error::Bus)? {}
block!(self.timer.wait()).ok();
for _bit in 0..8 {
data_in <<= 1;
if self.rx.is_high().map_err(Error::Bus)? {
data_in |= 1
}
block!(self.timer.wait()).ok();
}
// wait for stop bit
block!(self.timer.wait()).ok();
Ok(data_in)
}
should be:
fn read(&mut self) -> nb::Result<u8, Self::Error> {
let mut data_in = 0;
// wait for start bit
while self.rx.is_high().map_err(Error::Bus)? {}
block!(self.timer.wait()).ok();
block!(self.timer.wait()).ok();
block!(self.timer.wait()).ok();
for _bit in 0..8 {
data_in >>= 1;
if self.rx.is_high().map_err(Error::Bus)? {
data_in |= 0x80
}
block!(self.timer.wait()).ok();
}
// wait for stop bit
block!(self.timer.wait()).ok();
Ok(data_in)
}
The serial read appears to be broken.
The first issue is that it's loading bits from the LSB - so the final byte will be reversed. It should be loading from the MSB and shifting right.
The second issue I found when experimenting, is that in practice the start bit delay was too short - this resulted in the received byte being 4x as large (truncated) as the intended value (when the first issue was accounted for). Adding 2 extra delay periods in the start bit seemed to fix this. Please see if you can reproduce this problem as it may just be my equipment.
should be:
even then I cant get it to work reliably...