search

sancus-tee / sancus-core

Minimal OpenMSP430 hardware extensions for isolation and attestation
BSD 3-Clause "New" or "Revised" License
20 stars 13 forks source link

Fix IRQ tests #28

Closed fritzalder closed 2 years ago

fritzalder commented 2 years ago

In the last PR changes, we broke two of the CI tests:

 FAILED TESTS:
               -  ./log/sancus-sm_crypto_irq.log 
               -  ./log/sancus-sm_mem_violation.log
jovanbulck commented 2 years ago

I reverted the extra cycle that broke these tests.

The root cause for the extra cycle for memory glitches in verilator has normally been fixed as per cd88c513e6a079cab951fe3416b034b74ec4c7ae

I tested this locally with sancus-examples and will trigger a CI rebuild as well.

jovanbulck commented 2 years ago

reopening, I was too quick here, we do need the extra cycle indeed, good we have CI :sweat_smile:

jovanbulck commented 2 years ago

hm pinpointed the issue, it seems like DMA accesses can intervene and overwrite the value on the memory bus during the wait cycle :exploding_head:

ext_dmem_en in the backbone, the exec unit should keep the bus busy during the extra wait cycle I think

jovanbulck commented 2 years ago

normally fixed now, this was a very tricky issue that we would have never found without the (randomized) DMA accesses in the CI tests! ^^

fritzalder commented 2 years ago

Really nice catch!