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sancus-tee / sancus-core

Minimal OpenMSP430 hardware extensions for isolation and attestation
BSD 3-Clause "New" or "Revised" License
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Support testbench in sancus-sim #5

Closed jovanbulck closed 5 years ago

jovanbulck commented 7 years ago

Currently, the standard openMSP430 simulator code (core/bench/verilog/) and the Sancus simulator (core/sim/rtl_sim/sancus/) are duplicated. These should be merged again, so that sancus-sim can be ran with a Verilog stimulus file.

We could then run the standard openMSP430 testbench (core/sim/rtl_sim/src and core/sim/rtl_sim/src-c) to ensure backwards compatibility. Moreover, we could include our own custom tests for the custom Sancus instructions.

jovanbulck commented 7 years ago

We should also setup continuous integration to run the test suite each time the repository is updated.

jovanbulck commented 7 years ago

As per 458dbaf continuous integration has been set up for the original openMSP430 test suite. This ensures guaranteed backwards compatibility of the Sancus CPU extensions.

We should still merge the code bases for sancus-sim and the openMSP430 simulator, however, and add specific unit tests for the Sancus instructions.

jovanbulck commented 5 years ago

13 implements a dedicated sancus-sim asm/stimulus testbench for secure IRQ logic. We can add further unit test cases for dedicated Sancus instructions here, so this issue can be closed.