I feel something wrong in SPI.begin for LoRa 2 already as it overwrite the SPI begin in LoRa 1.
From the code of this library, I see SS will be set HIGH or LOW before/after read/write registers.
My scenario is to receive via LoRa 1 and to send async with LoRa 2.
How the library enable my LoRa_SS and LoRa2_SS in this case?
I have an ESP32 with 2 SPI SX1278.
This is the architecture![image](https://user-images.githubusercontent.com/29994971/83325658-1dfbee80-a298-11ea-801b-357b411b9f8a.png)
The mapping is below. MISO, MOSI and SCK are shared for 2 LoRa.
For LoRa 1
For LoRa 2
I feel something wrong in SPI.begin for LoRa 2 already as it overwrite the SPI begin in LoRa 1. From the code of this library, I see SS will be set HIGH or LOW before/after read/write registers.
My scenario is to receive via LoRa 1 and to send async with LoRa 2. How the library enable my LoRa_SS and LoRa2_SS in this case?
Thanks a lot.