Open DmitriLyalikov opened 10 months ago
Hi @DmitriLyalikov,
Is there any way around this? What if I were to hoist the RX and TX handlers on separate cores?
This is not something I've looked into.
Please update this thread with any progress you make.
Hi,
I am trying to evaluate the signal integrity of this interface with a loopback module (RJ45 connector with TX connected to RX).
So far I am not seeing that the RX pio statemachine can receive simultaneously with the TX being transmitted because there is some delay associted with the ISR on gpio trigger on falling edge, so it is essentially half duplex.
Is there any way around this? What if I were to hoist the RX and TX handlers on separate cores?
Please advise, if you have any technical insight. I would love to explore this and share any results