Chisel3 > 3.6.0 requires explicitly passing the write clocks to individual ports of a multi-clock memory. This is hereby fixed in the example code. Note that this changes the memory's behavior from outputting zero when nothing is read to outputting a don't care.
Chisel3 > 3.6.0 requires explicitly passing the write clocks to individual ports of a multi-clock memory. This is hereby fixed in the example code. Note that this changes the memory's behavior from outputting zero when nothing is read to outputting a don't care.