Closed xurtis closed 2 years ago
Should armv7 also be updated in the same way?
armv7 performs this check in the kernel using the API to execute a function in the kernel. As this is performed while the kernel lock is held and while interrupts are disabled, it cannot be preempted.
armv7 performs this check in the kernel using the API to execute a function in the kernel. As this is performed while the kernel lock is held and while interrupts are disabled, it cannot be preempted.
Can you show me where, because from what I can see, it accesses the register directly from userlevel: https://github.com/seL4/seL4_libs/blob/master/libsel4bench/arch_include/arm/armv/armv7-a/sel4bench/armv/sel4bench.h#L91
Not sure where I saw it. You're right, the issue is also an ARMv7.
any plans to merge this?
If the cycle counter is disabled during a read, the operation can be preempted and lose the count of cycles for the duration of the preemption.